A Novel Fast FIR Algorithm for Area-Efficient Parallel FIR Digital Filter Structures Utilizes Symmetric Convolutions

IOSR journal of VLSI and Signal Processing
doi 10.9790/4200-04123946
Full Text
Abstract

Available in full text

Date
Authors
Publisher

IOSR Journals

Related search

Reducing Computation Delay of Parallel FIR Digital Filter Structures for Symmetric Convolutions Based on Fast FIR Algorithm by Using CSA

IOSR journal of VLSI and Signal Processing
2014English

Area-Efficient VLSI Implementation for Parallel Linear-Phase FIR Digital Filters of Odd Length Based on Fast FIR Algorithm

IOSR Journal of Electrical and Electronics Engineering
2013English

An Efficient FIR Filter for Electrocardiogram Signal

International Journal of Trend in Scientific Research and Development
2018English

Area Efficient Reloadable FIR Filter Based on NEw Distributed Arithmetic (NEDA)

International Journal of Engineering Research and
2016English

A Novel Low-Complexity Method for Parallel Multiplierless Implementation of Digital FIR Filters

English

Efficient Implementation of Multiplier for Digital FIR Filters

International Journal of Engineering Research and
2015English

Minimizing Design Costs of an FIR Filter Using a Novel Coefficient Optimization Algorithm

Mathematical Problems in Engineering
MathematicsEngineering
2014English

FPGA Implementation of High Speed Digital FIR Filter

International Journal of Advanced Networking Applications
2018English

Design of FIR Filters for Fast Multiscale Directional Filter Banks

International Journal of u- and e- Service, Science and Technology
Computer NetworksSoftwareCommunications
2014English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2024 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy