Amanote Research
Register
Sign In
Serial Reconfigurable Mismatch-Tolerant Clock Distribution
doi 10.1145/1629911.1630068
Full Text
Open PDF
Abstract
Available in
full text
Date
January 1, 2009
Authors
Atanu Chattopadhyay
Zeljko Zilic
Publisher
ACM Press
Related search
GHz Serial Passive Clock Distribution in VLSI Using Bidirectional Signaling
Transistorized Digital Clock With Serial Binary-Coded Readout
"Turning Back the Clock" on Serial-Stimulus Sign Tracking.
Journal of the Experimental Analysis of Behavior
Behavioral Neuroscience
Experimental
Cognitive Psychology
ReCoNet: Modeling and Implementation of Fault Tolerant Distributed Reconfigurable Hardware
A Reconfigurable Distributed Architecture for Clock Generation in Large Many-Core SoC
A Reconfigurable Damage-Tolerant Controller Based on a Modal Double-Loop Framework
Mechanical Systems and Signal Processing
Control
Systems Engineering
Signal Processing
Mechanical Engineering
Civil
Structural Engineering
Computer Science Applications
Aerospace Engineering
Fault-Tolerant Key Distribution (Preliminary Version)
Fault-Tolerant Key Distribution (Preliminary Version)
Constrained MMSE Estimator for Distribution Mismatch Compensation
