Amanote Research

Amanote Research

    RegisterSign In

Bare Chip LSI and Hybrid Packaging.

HYBRIDS
doi 10.5104/jiep1985.5.8
Full Text
Open PDF
Abstract

Available in full text

Date

January 1, 1989

Authors
Noriaki SakamotoMasakazu Yamagishi
Publisher

Japan Institute of Electronics Packaging


Related search

A Single-Chip NMOS Analog Front-End LSI for Modems

IEEE Journal of Solid-State Circuits
Electronic EngineeringElectrical
1982English

A Multiproject Chip Approach to the Teaching of Analog MOS LSI and VLSI

IEEE Transactions on Education
Electronic EngineeringEducationElectrical
1982English

Bare Plurals, Bare Conditionals, and Only

Journal of Semantics
LinguisticsArtsLanguageArtificial IntelligenceHumanities
1997English

MICROBONDING AND PACKAGING FOR HYBRID MICROELECTRONIC CIRCUITS. Final Report.

1971English

LSI Implementation.

1977English

Hybrid Intracerebral Probe With Integrated Bare LED Chips for Optogenetic Studies

Biomedical Microdevices
NanotechnologyBiomedical EngineeringMolecular BiologyNanoscience
2017English

Repeater and Current-Sensing Hybrid Circuits for On-Chip Interconnects

2003English

Electrolytic Deposition of Fine Pitch Sn/Cu Solder Bumps for Flip Chip Packaging

International Symposium on Microelectronics
2012English

Congestion-Driven Parallel Placement Procedure for LSI Cells Based on Hybrid Genetic Algorithm

Transactions of the Institute of Systems, Control and Information Engineers
2001English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2025 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy