Amanote Research

Amanote Research

    RegisterSign In

Implementation of Efficient Johnson Counter Using Diode Free Adiabatic Logic (DFAL)

IOSR Journal of Electronics and Communication Engineering
doi 10.9790/2834-1202030105
Full Text
Open PDF
Abstract

Available in full text

Date

April 1, 2017

Authors
K. Ram BharatkumarM. Rajan BabuV. Asha LakshmiN. Sai Niharika
Publisher

IOSR Journals


Related search

Design and Analysis of Johnson Counter Using Finfet Technology

IOSR journal of VLSI and Signal Processing
2013English

Adiabatic Dynamic Logic

IEEE Journal of Solid-State Circuits
Electronic EngineeringElectrical
1995English

Contactless Capacitive Adiabatic Logic

2017English

Implementation of an Efficient Fuzzy Logic Based Information Retrieval System

ICST Transactions on Scalable Information Systems)</
2015English

Investigating the Effectiveness of Without Charge-Sharing Quasi-Adiabatic Logic for Energy Efficient and Secure Cryptographic Implementations

Microelectronics Journal
2018English

Sub-kBT Bit-Energy Operation of Superconducting Logic Devices Using Adiabatic Quantum Flux Parametron

2013English

Ultralow-Power and Secure S-Box Circuit Using FinFET Based ECRL Adiabatic Logic

Journal of Science and Technology
2018English

Reversibility and Energy Dissipation in Adiabatic Superconductor Logic

Scientific Reports
Multidisciplinary
2017English

Adiabatic Logic Circuits for Low Power VLSI Applications

International Journal of Science and Research (IJSR)
2016English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2025 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy