Amanote Research
Register
Sign In
Potentials of Chip-Package Co-Design for High-Speed Digital Applications
doi 10.1145/307418.307535
Full Text
Open PDF
Abstract
Available in
full text
Date
January 1, 1999
Authors
Gerhard Tröster
Publisher
ACM Press
Related search
A Digital Vision Chip Specialized for High-Speed Target Tracking
IEEE Transactions on Electron Devices
Electronic Engineering
Optical
Electrical
Magnetic Materials
Electronic
Design of On-Chip Testing Memory for High Speed Circuits
CVR Journal of Science & Technology
Wireless System-On-Chip and System-On-Package Design for Biomedical Applications
Design Optimization of Parallel Manipulators for High-Speed Precision Machining Applications
IFAC Proceedings Volumes
On-Chip Digital Power Supply Control for System-On-Chip Applications
Variable Supply-Voltage Scheme for Low-Power High-Speed CMOS Digital Design
IEEE Journal of Solid-State Circuits
Electronic Engineering
Electrical
Design & Implementation of 3-Bit High Speed Flash ADC for Wireless LAN Applications
IJARCCE
Design of a High Speed and Area Efficient Novel Adder for AES Applications
International Journal of Recent Technology and Engineering
Engineering
Management of Technology
Innovation
Computer-Aided Design Package for Designers of Digital Optical Computers.