The Reliability of Semiconductor RAM Memories With On-Chip Error-Correction Coding

IEEE Transactions on Information Theory - United States
doi 10.1109/18.79957
Full Text
Abstract

Available in full text

Date
Authors
Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Related search

Crosstalk Aware Multi-Bit Error Detection With Limited Error Correction Coding for Reliable On-Chip Communication

International Journal of Computer Applications
2018English

An Optoelectronic-Vlsi Chip With Forward Error Correction to Improve the Reliability of Parallel Optical Data Links

2003English

Energy-Aware Error Control Coding for Flash Memories

2009English

Error Detection and Correction for Optical Memories

1997English

Analysis of Forward Error Correction Methods for Nanoscale Networks-On-Chip

2007English

Joint Rewriting and Error Correction in Write-Once Memories

2013English

An Effective Error Correction Scheme for Arithmetic Coding

Mathematical Problems in Engineering
MathematicsEngineering
2015English

PPM Reduction on Embedded Memories in System on Chip

12th IEEE European Test Symposium (ETS'07)
2007English

On the Influence of Coding on the Mean Time to Failure for Degrading Memories With Defects

English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2024 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy