Amanote Research
Register
Sign In
An Efficient Prototype for Gals Systems in Asynchronous Network-On-Chips Through Multiclocking
International Journal of Science and Research (IJSR)
doi 10.21275/art20175428
Full Text
Open PDF
Abstract
Available in
full text
Date
July 5, 2017
Authors
Unknown
Publisher
International Journal of Science and Research
Related search
Asynchronous Testing of Synchronous Components in GALS Systems
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
Asynchronous-Channels and Time-Domains Extending Petri Nets for GALS Systems
IFIP Advances in Information and Communication Technology
Computer Networks
Information Systems
Management
Communications
The Amulet Chips: Architectural Development for Asynchronous Microprocessors
An Efficient Scheme for Accommodating Synchronous Traffic in a Cable-Modem Network While Avoiding Segmentation of Asynchronous Packets
Computer Communications
Computer Networks
Communications
Resolving Deadlocks for Pipelined Stream Applications on Network-On-Chips
Adaptive Routing in Network-On-Chips Using a Dynamic-Programming Network
IEEE Transactions on Industrial Electronics
Control
Systems Engineering
Computer Science Applications
Electrical
Electronic Engineering
Efficient Random Network Coding for Distributed Storage Systems
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
Multistable Network Dynamics Through Lateral Inhibition: An Efficient Mechanism for Selective Information Routing
BMC Neuroscience
Neuroscience
Cellular
Molecular Neuroscience
Accurate and Efficient Network Tomography Through Network Coding
IEEE Transactions on Vehicular Technology
Electronic Engineering
Automotive Engineering
Computer Networks
Applied Mathematics
Communications
Electrical
Aerospace Engineering