Amanote Research

Amanote Research

    RegisterSign In

3d-Via Driven Partitioning for 3D VLSI Integrated Circuits

CLEI Electronic Journal
doi 10.19153/cleiej.13.3.1
Full Text
Open PDF
Abstract

Available in full text

Date

December 1, 2010

Authors
Sandro SawickiGustavo WilkeMarcelo JohannRicardo Reis
Publisher

Centro Latino Americano de Estudios en Informatica


Related search

A Method for I/O Pins Partitioning Targeting 3D VLSI Circuits

English

Multilayer Coaxial Superconducting Circuits With Integrated 3D Wiring

2019English

Cell Transformations and Physical Design Techniques for 3D Monolithic Integrated Circuits

ACM Journal on Emerging Technologies in Computing Systems
Electronic EngineeringNanoscienceHardwareElectricalArchitectureNanotechnologySoftware
2013English

Reliability-Driven CAD System for Deep-Submicron VLSI Circuits

1998English

Photonic-Integrated Circuits With Non-Planar Topologies Realized by 3d-Printed Waveguide Overpasses

Optics Express
OpticsAtomicMolecular Physics,
2019English

Simultaneous Power and Thermal Integrity Driven via Stapling in 3D ICs

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
Computer Science ApplicationsComputer GraphicsComputer-Aided DesignSoftware
2006English

Analogy-Driven 3D Style Transfer

Computer Graphics Forum
Computer NetworksComputer GraphicsComputer-Aided DesignCommunications
2014English

Data-Driven 3D Shape Modeling

English

Simultaneous 25 Plane 3D Live Imaging System for Neural Circuits

Biophysical Journal
Biophysics
2019English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2025 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy