Amanote Research
Register
Sign In
Timing Analysis of Embedded Software for Speculative Processors
doi 10.1109/isss.2002.1227164
Full Text
Open PDF
Abstract
Available in
full text
Date
Unknown
Authors
T. Mitra
A. Roychoudhury
Publisher
ACM
Related search
Architectural Support for Safe Software Execution on Embedded Processors
Speculative Branch Folding for Pipelined Processors
IEICE Transactions on Information and Systems
Electronic Engineering
Pattern Recognition
Hardware
Computer Vision
Electrical
Architecture
Artificial Intelligence
Software
A Theory for Software-Hardware Co-Scheduling for ASIPs and Embedded Processors
Compiler Design Issues for Embedded Processors
IEEE Design & Test of Computers
Broadcast Mechanism for Improving Conditional Branch Prediction in Speculative Multithreaded Processors
Cost-Effective Design Strategies for Securing Embedded Processors
IEEE Transactions on Emerging Topics in Computing
Computer Science Applications
Information Systems
Computer Science
Human-Computer Interaction
RCG: Retargetable Code Generation Methodology for Embedded Processors
Journal of Convergence Information Technology
A Basic Linear Algebra Compiler for Embedded Processors
Post-Placement Voltage Island Generation for Timing-Speculative Circuits
