A Multi-Mode Power Gating Structure for Low-Voltage Deep-Submicron CMOS ICs

IEEE Transactions on Circuits and Systems II: Express Briefs
doi 10.1109/tcsii.2007.894428
Full Text
Abstract

Available in full text

Date
Authors
Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Related search

Low Power Current Mode ADC for CMOS Sensor IC

English

A Study in Low-Power Wireless Transceiver Architectures in Submicron CMOS Technology

English

Leakage Current in Deep-Submicron Cmos Circuits

Journal of Circuits, Systems and Computers
HardwareElectronic EngineeringElectricalArchitecture
2002English

Compact Low-Power High Slew-Rate CMOS Buffer Amplifier With Power Gating Technique

International Journal of VLSI Design & Communication Systems
2014English

Design of High-Speed Low-Power Two Level Voltage Converters Using Multi-VTH CMOS Technology

International Journal of Computer Applications
2013English

Variable Supply-Voltage Scheme for Low-Power High-Speed CMOS Digital Design

IEEE Journal of Solid-State Circuits
Electronic EngineeringElectrical
1998English

Gain and Bandwidth Enhancement in CMOS Low-Voltage Low-Power Operational Amplifiers

International Journal of Computer Applications
2019English

Low Voltage CMOS Power Amplifier With Integrated Capacitive Harmonic Termination

International Journal of Innovative Technology and Exploring Engineering
Mechanics of MaterialsElectronic EngineeringCivilStructural EngineeringElectricalComputer Science
2019English

Low-Power Clock Tree Synthesis for 3d-ICs

ACM Transactions on Design Automation of Electronic Systems
Computer Science ApplicationsElectronic EngineeringComputer GraphicsElectricalComputer-Aided Design
2017English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2024 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy