Amanote Research
Register
Sign In
A Sensor-Less NBTI Mitigation Methodology for NoC Architectures
doi 10.1109/socc.2012.6398329
Full Text
Open PDF
Abstract
Available in
full text
Date
September 1, 2012
Authors
Davide Zoni
William Fornaciari
Publisher
IEEE
Related search
Network Interface Sharing Techniques for Area Optimized NoC Architectures
Fault-Tolerant Buffer Aware Round Robin Arbiter Design for NoC Architectures
International Journal of Computing and Digital Systems
Computer Graphics
Human-Computer Interaction
Computer Networks
Communications
Information Systems
Computer-Aided Design
Innovation
Management of Technology
Artificial Intelligence
A High-Level Synthesis Methodology for Dedicated DSP Architectures
The International Conference on Electrical Engineering
A Flexible Simulation Methodology and Tool for Nanoarray-Based Architectures
Evolving KERAS Architectures for Sensor Data Analysis
Intelligent Sensor Tasking for Space Collision Mitigation
STG-NoC: A Tool for Generating Energy Optimized Custom Built NoC Topology
International Journal of Computer Applications
Automated Initialization for Marker-Less Tracking: A Sensor Fusion Approach
Forensic Cell Site Analysis: A Validation & Error Mitigation Methodology
The Journal of Digital Forensics, Security and Law
