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Publications by Alexander Barkalov
Hardware Reduction for Lut–Based Mealy FSMs
International Journal of Applied Mathematics and Computer Science
Reduction in the Number of PAL Macrocells in the Circuit of a Moore FSM
International Journal of Applied Mathematics and Computer Science
Engineering
Computer Science
Applied Mathematics
Related publications
Placement-Driven Technology Mapping for LUT-based FPGAs
LUT Based Generalized Parallel Counters for State - Of - Art FPGAs
Electronics
Electronic Engineering
Electrical
A Novel Approach to Minimizing Reconfiguration Cost for LUT-based FPGAs
LUT Wrap Up
Design of Hybrid LUT/MUX FPGA Logic Architecture for Size Reduction and Performance Improvement in FPGA
International Journal of Innovative Technology and Exploring Engineering
Mechanics of Materials
Electronic Engineering
Civil
Structural Engineering
Electrical
Computer Science
From Test Cases to FSMs
Dedicated Hardware for Attribute-Based Credential Verification
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
Nexus: Hardware Support for Task-Based Programming
A Practical FPGA-based LUT-predistortion Technology for Switch-Mode Power Amplifier Linearization
