Amanote Research
Register
Sign In
Discover open access scientific publications
Search, annotate, share and cite publications
Publications by Chandra Pratap
A New Technique for Leakage Power Reduction in CMOS Circuit by Using DSM
International Journal of Computer Applications
Related publications
Leakage Power Reduction by Using Sleep Switches in Domino Logic Circuit Design in DSM Technology
International Journal of Computer Applications
Techniques for Sub-Threshold Leakage Reduction in Low Power CMOS Circuit Designs
International Journal of Computer Applications
A Gate-Level Leakage Power Reduction Method for Ultra-Low-Power CMOS Circuits
An Algorithm for Leakage Power Reduction Through IVC in CMOS VLSI Digital Circuits
International Journal of Computer Applications
Design Techniques for Gate-Leakage Reduction in CMOS Circuits
Runtime Mechanisms for Leakage Current Reduction in CMOS VLSI Circuits
Ultralow-Power CMOS/SOI Circuit Technology
IEEJ Transactions on Electronics, Information and Systems
Electronic Engineering
Electrical
Minimizing Power Consumption in CMOS Full Subtractor Using SVL Technique
International Journal of Computer Applications
Sensitivity Analysis of a Magnetic Circuit for Non-Destructive Testing by the Magnetic Flux Leakage Technique
