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Publications by D. Sathyanarayanan
Implementation of VLSI Interconnect Design
International Journal of Advanced Technology and Engineering Exploration
Related publications
Design and Implementation of Ternary Logic Circuits for VLSI Applications
International Journal of Innovative Technology and Exploring Engineering
Mechanics of Materials
Electronic Engineering
Civil
Structural Engineering
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Moment-Maching Analysis of High-Speed VLSI Interconnect Models.
Design and Implementation of Kogge Stone Adder Using CMOS and GDI Design: VLSI Based
International Journal of Engineering and Advanced Technology
Engineering
Computer Science Applications
Environmental Engineering
Multilevel Optimization of High Speed VLSI Interconnect Networks by Decomposition.
VLSI Implementation of Discrete Wavelet Transform
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hardware
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Architecture
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Generalized Moment-Matching Methods for Interconnect Analysis of High-Speed VLSI Systems.
Design of FPGA Interconnect for Multilevel Metalization
VLSI Implementation of a Montgomery Modular Multiplier
System Level Interconnect Design for Network-On-Chip Using Interconnect IPs
