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Publications by Davide Bertozzi
Self-Calibrating Source Synchronous Communication for Delay Variation Tolerant GALS Network-On-Chip Design
International Journal of Embedded and Real-Time Communication Systems
Computer Science
Network Interface Sharing Techniques for Area Optimized NoC Architectures
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Timing-Error-Tolerant Network-On-Chip Design Methodology
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
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Computer Graphics
Computer-Aided Design
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Self Calibrating Clocks for Globally Asynchronous Locally Synchronous Systems
System-On-Chip Sensor Fusion Front-End Self-Healing Design for Network-On-Chip Digital Communications
Promoting Tolerance for Delay Tolerant Network Research
Computer Communication Review
Computer Networks
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Pseudonymised Communication in Delay Tolerant Networks
Fpga Based Highly Reliable Fault Tolerant Approach for Network on Chip(noc)
International Journal of Research in Engineering and Technology
Design of Adaptive Communication Channel Buffers for Low-Power Area-Efficient Network-On-Chip Architecture
Formal Analysis of a Fault-Tolerant Routing Algorithm for a Network-On-Chip
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
Low-Cost Adaptive and Fault-Tolerant Routing Method for 2D Network-On-Chip
IEICE Transactions on Information and Systems
Electronic Engineering
Pattern Recognition
Hardware
Computer Vision
Electrical
Architecture
Artificial Intelligence
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