Amanote Research
Register
Sign In
Discover open access scientific publications
Search, annotate, share and cite publications
Publications by Gernot Gebhard
Branch Target Buffers: WCET Analysis Framework and Timing Predictability
Journal of Systems Architecture
Hardware
Architecture
Software
Using Polyhedral Techniques to Tighten WCET Estimates of Optimized Code: A Case Study With Array Contraction
Related publications
A Contribution to Branch Prediction Modeling in WCET Analysis
A XML-Based Representation of Timing Information for Wcet Analysis
Journal of Mathematics and Computer Science
Computational Mechanics
Computational Mathematics
Computer Science Applications
Mathematics
Analysis of Branch Prediction Strategies and Branch Target Buffer Design
Performance Evaluation
Computer Networks
Simulation
Hardware
Communications
Architecture
Modeling
Software
A WCET-Oriented Static Branch Prediction Scheme for Real Time Systems
Branch Target Buffer Design and Optimization
IEEE Transactions on Computers
Hardware
Architecture
Mathematics
Computational Theory
Theoretical Computer Science
Software
Symbolic Simulation on Complicated Loops for WCET Path Analysis
Measurement Based WCET Analysis for Multi-Core Architectures
Fast Approximation Framework for Timing and Power Analysis of Ultra-Low-Voltage Circuits
IEEE Transactions on Circuits and Systems I: Regular Papers
Electronic Engineering
Electrical
Heuristics of the Branch-Cut-And-Price-Framework SCIP
