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Publications by Jason Cong
Efficient Heuristics for the Minimum Shortest Path Steiner Arborescence Problem With Applications to VLSI Physical Design
An Area-Optimality Study of Floorplanning
Multilevel Global Placement With Retiming
Architecture-Level Synthesis for Automatic Interconnect Pipelining
Intellectual Property Protection by Watermarking Combinational Logic Synthesis Solutions
RF Interconnects for Communications On-Chip
Timing Closure Based on Physical Hierarchy
Performance-Driven Multi-Level Clustering With Application to Hierarchical FPGA Mapping
Low-Power Technology Mapping for FPGA Architectures With Dual Supply Voltages
Simultaneous FU and Register Binding Based on Network Flow Method
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