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Publications by Jie Hu

System-Level Energy Modeling for Heterogeneous Reconfigurable Chip Multiprocessors

2006English
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Performance Modeling of Multithreaded Programs for Mobile Asymmetric Chip Multiprocessors

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Adaptive Zone-Aware Multi-Bank on Chip Last Level L2 Cache Partitioning for Chip Multiprocessors

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A Framework for Dynamic Resource Assignment and Scheduling on Reconfigurable Mixed-Mode On-Chip Multiprocessors

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Energy-Aware Computation Duplication for Improving Reliability in Embedded Chip Multiprocessors

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Photonic Networks-On-Chip for Future Generations of Chip Multiprocessors

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Constraint Based System-Level Diagnosis of Multiprocessors

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Author Retrospective for Cooperative Cache Partitioning for Chip Multiprocessors

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Optimizing Array-Intensive Applications for On-Chip Multiprocessors

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High Level Modeling of Dynamic Reconfigurable FPGAs

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