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Publications by Josep Torrellas
WiSync
ACM SIGPLAN Notices
Computer Science
ShortCut
ACM SIGARCH Computer Architecture News
WiSync
ACM SIGARCH Computer Architecture News
VARIUS-NTV: A Microarchitectural Model to Capture the Increased Sensitivity of Manycores to Process Variations at Near-Threshold Voltages
Caspar
OmniOrder: Directory-Based Conflict Serialization of Transactions
M3T: Morphable Multithreaded Memory Tiles
Architectural Support for Scalable Speculative Parallelization in Shared-Memory Multiprocessors
