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Publications by Kenichi Yoda
Design and Implementation of a High-Speed Bit-Serial SFQ Adder Based on the Binary Decision Diagram
Superconductor Science and Technology
Electronic Engineering
Alloys
Condensed Matter Physics
Metals
Materials Chemistry
Electrical
Composites
Ceramics
Related publications
Design & Implementation of 3-Bit High Speed Flash ADC for Wireless LAN Applications
IJARCCE
Design and Implementation of a Fully Asynchronous SFQ Microprocessor: SCRAM2
IEEE Transactions on Applied Superconductivity
Electronic Engineering
Condensed Matter Physics
Optical
Electrical
Magnetic Materials
Electronic
20 GHz Operation of Bit-Serial Handshaking Systems Using Asynchronous SFQ Logic Circuits
IEEE Transactions on Applied Superconductivity
Electronic Engineering
Condensed Matter Physics
Optical
Electrical
Magnetic Materials
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A CNFET Full Adder Cell Design for High-Speed Arithmetic Units
Turkish Journal of Electrical Engineering and Computer Sciences
Electronic Engineering
Electrical
Computer Science
Design of a High Speed and Area Efficient Novel Adder for AES Applications
International Journal of Recent Technology and Engineering
Engineering
Management of Technology
Innovation
Implementation of 24 Bit High Speed Floating Point Vedic Multiplier
International Journal of Advance Engineering and Research Development
High Speed Capacitor-Inverter Based Carbon Nanotube Full Adder
Nanoscale Research Letters
Materials Science
Nanotechnology
Condensed Matter Physics
Nanoscience
Efficient Serial Multiplier Design Using Ripple Counters,Kogge-Stone Adder and Full Adder
International Journal of Computer Applications
Cell Based Design Methodology for BDD SFQ Logic Circuits: A High Speed Test and Feasibility for Large Scale Circuit Applications
IEEE Transactions on Applied Superconductivity
Electronic Engineering
Condensed Matter Physics
Optical
Electrical
Magnetic Materials
Electronic