Amanote Research
Register
Sign In
Discover open access scientific publications
Search, annotate, share and cite publications
Publications by M. Geilen
Minimising Buffer Requirements of Synchronous Dataflow Graphs With Model Checking
Related publications
Schedule-Extended Synchronous Dataflow Graphs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
Buffer Merging Technique for Minimizing Memory Footprints of Synchronous Dataflow Specifications
Efficient Computation of Buffer Capacities for Cyclo-Static Dataflow Graphs
Proceedings - Design Automation Conference
Control
Systems Engineering
Electronic Engineering
Simulation
Hardware
Computer Science Applications
Electrical
Architecture
Modeling
Generalized Extraction of Real-Time Parameters for Homogeneous Synchronous Dataflow Graphs
A Model-Based Schedule Representation for Heterogeneous Mapping of Dataflow Graphs
State-Based Model Checking of Event-Driven System Requirements
IEEE Transactions on Software Engineering
Software
Analytic Multi-Loop Results Using Finite Fields and Dataflow Graphs With FiniteFlow
Quasi-Static Scheduling of Reconfigurable Dataflow Graphs for DSP Systems
Scheduling and Buffer Sizing of N-Synchronous Systems
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
