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Publications by Mizuki YAMADA
Hardware-Aware Sum-Product Decoding in the Decision Domain
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Electronic Engineering
Computer Graphics
Signal Processing
Applied Mathematics
Electrical
Computer-Aided Design
A Statistical Study of 55 Patients With Extramammary Paget's Disease
Skin Cancer
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An Analysis of the Sum-Product Decoding of Analog Compound Codes
Gaussian Approximation for Sum-Product Decoding of Low-Density Parity-Check Codes
Context-Aware Entity Morph Decoding
List Decoding of Direct Sum Codes
An Efficient Hardware Interleaver for 3G Turbo Decoding
Sum and Product in Dynamic Epistemic Logic
Journal of Logic and Computation
Arts
Humanities
Hardware
Architecture
Logic
Theoretical Computer Science
Software
Multi-Resolution Meshes for Feature-Aware Hardware Tessellation
Computer Graphics Forum
Computer Networks
Computer Graphics
Computer-Aided Design
Communications
Decoding Rule Search Domain in the Left Inferior Frontal Gyrus
PLoS ONE
Multidisciplinary
Low-Density Parity-Check Codes for Discretized Min-Sum Decoding