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Publications by Pavithra D
A Novel Fast FIR Algorithm for Area-Efficient Parallel FIR Digital Filter Structures Utilizes Symmetric Convolutions
IOSR journal of VLSI and Signal Processing
Related publications
Reducing Computation Delay of Parallel FIR Digital Filter Structures for Symmetric Convolutions Based on Fast FIR Algorithm by Using CSA
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Area-Efficient VLSI Implementation for Parallel Linear-Phase FIR Digital Filters of Odd Length Based on Fast FIR Algorithm
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An Efficient FIR Filter for Electrocardiogram Signal
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Area Efficient Reloadable FIR Filter Based on NEw Distributed Arithmetic (NEDA)
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A Novel Low-Complexity Method for Parallel Multiplierless Implementation of Digital FIR Filters
Efficient Implementation of Multiplier for Digital FIR Filters
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Minimizing Design Costs of an FIR Filter Using a Novel Coefficient Optimization Algorithm
Mathematical Problems in Engineering
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FPGA Implementation of High Speed Digital FIR Filter
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Design of FIR Filters for Fast Multiscale Directional Filter Banks
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