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Publications by Sharanabasaveshwar Hiremath
An Efficient VLSI Implementation of De-Blocking Filter With CSLA for H.264
International Journal of Intelligent Engineering and Systems
Engineering
Computer Science
Related publications
High Performance VLSI Implementation for H.264 Inter/Intra Prediction
VLSI Implementation of Motion Estimation Using Level Convertor With CSLA Adder
International Journal of Intelligent Engineering and Systems
Engineering
Computer Science
VLSI Implementation of FIR Filter for Discrete Wavelet Transform
International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering
An Efficient VLSI Architecture for Adaptive Rank Order Filter for Image Noise Removal
International Journal of Information and Electronics Engineering
A High Performance H.264 Deblocking Filter
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
An Efficient Deblocking Filter Algorithm for Reduction of Blocking Artifacts in HEVC Standard
International Journal of Image, Graphics and Signal Processing
High-Performance Arithmetic Coding VLSI Macro for the H.264 Video Compression Standard
135-MHz 258-K Gates VLSI Design for All-Intra H.264/Avc Scalable Video Encoder
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hardware
Electronic Engineering
Electrical
Architecture
Software
An Effective Implementation of SOL’s Technique for Power and Coding Efficient VLSI Architecture in DSRC Applications
International Journal of VLSI & Signal Processing
