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Publications by Shin'ichiro Mutoh
Increasing Static Noise Margin of Single-Bit-Line SRAM by Lowering Bit-Line Voltage During Reading
Related publications
Design of Low Power SRAM Using Hierarchical Divided Bit-Line Approach in 180-Nm Technology
International Journal of Engineering Research and
Bit by Bit
Against the Grain
Clock-Biased Local Bit Line for High Performance Register Files
Electronics Letters
Electronic Engineering
Electrical
Design of a Ku Band Six Bit Phase Shifter Using Periodically Loaded-Line and Switched-Line With Loaded-Line
Progress In Electromagnetics Research
A Single-Chip SC Line Equalizer System for Full Duplex Multi-Bit Rate Digital Transmission
Reducing Power in Superscalar Processor Caches Using Subbanking, Multiple Line Buffers and Bit-Line Segmentation
Power and Area Efficient Sub-Threshold 6T SRAM With Horizontal Local Bit-Lines and Bit-Interleaving
Bit by Bit/Edi & the X12 Format
Against the Grain
8 Bit Single Cycle Processor
INTERNATIONAL JOURNAL OF COMPUTER ENGINEERING & TECHNOLOGY
