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Publications by Triveni A Patil

Fully Reused VLSI Architecture of FM0/Manchester Encoding Technique for Memory Application

International Journal of Applied Science and Engineering
2015English

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Vlsi Design of Efficient Encoding Technique Using Rols Method for Wave Applications

International Journal of Research in Engineering and Technology
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VLSI Architecture for MB-OFDM Transmitter

IOSR journal of VLSI and Signal Processing
2014English

Design of a Parallel VLSI Processor for Road Extraction Based on Logic-In-Memory Architecture

Transactions of the Society of Instrument and Control Engineers
2000English

Development and Implementation of VLSI Reconfigurable Architecture for Gabor Filter in Medical Imaging Application

International Journal of Engineering and Management Research
2018English

An Effective Implementation of SOL’s Technique for Power and Coding Efficient VLSI Architecture in DSRC Applications

International Journal of VLSI & Signal Processing
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A Systolic VLSI Architecture for Complex SVD

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Universal Rotate Invert Bus Encoding for Low Power VLSI

International Journal of VLSI Design & Communication Systems
2012English

Speech Encoding and Encryption in VLSI

2003English

A VLSI Architecture for Linear Predictive Analysis of Speech.

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