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Publications by Xinchun Ji
A Novel Cascade Control Replica-Bitline Delay Technique for Reducing Timing Process-Variation of SRAM Sense Amplifier
IEICE Electronics Express
Electronic Engineering
Condensed Matter Physics
Optical
Electrical
Magnetic Materials
Electronic
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A High-Density Subthreshold SRAM With Data-Independent Bitline Leakage and Virtual Ground Replica Scheme
Digest of Technical Papers - IEEE International Solid-State Circuits Conference
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A 65nm 8T Sub-Vt SRAM Employing Sense-Amplifier Redundancy
Digest of Technical Papers - IEEE International Solid-State Circuits Conference
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Robust Activating Timing for SRAM SA With Replica Cell Voltage Boosted Circuit
IEICE Electronics Express
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Bitline PUF: Building Native Challenge-Response PUF Capability Into Any SRAM
Lecture Notes in Computer Science
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Adaptive Proactive Reconfiguration: A Technique for Process-Variability- And Aging-Aware SRAM Cache Design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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A Novel Switched Capacitor Technique for NBTI Tolerant Low Power 6t-Sram Cell Design
IOSR journal of VLSI and Signal Processing
A Design-For-Diagnosis Technique for SRAM Write Drivers
A Novel “Microbial Bait” Technique for Capturing Fe(III)-Reducing Bacteria
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Cascade Structure of Digital Predistorter for Power Amplifier Linearization
Radioengineering
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