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Quasi-Synchronous Checkpointing: Models, Characterization, and Classification

IEEE Transactions on Parallel and Distributed Systems - United States
doi 10.1109/71.780865
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Abstract

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Categories
HardwareComputational TheorySignal ProcessingArchitectureMathematics
Date

July 1, 1999

Authors
D. ManivannanM. Singhal
Publisher

Institute of Electrical and Electronics Engineers (IEEE)


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