Performance-Driven Architectural Synthesis for Distributed Register-File Microarchitecture With Inter-Island Delay
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences - Japan
doi 10.1587/transfun.e95.a.559
Full Text
Open PDFAbstract
Available in full text
Categories
Date
January 1, 2012
Authors
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)