Amanote Research
Register
Sign In
Efficient Sparse Matrix Multiple-Vector Multiplication Using a Bitmapped Format
doi 10.1109/hipc.2013.6799135
Full Text
Open PDF
Abstract
Available in
full text
Date
December 1, 2013
Authors
Ramaseshan Kannan
Publisher
IEEE
Related search
Parallel Multicore CSB Format and Its Sparse Matrix Vector Multiplication
Advances in Linear Algebra & Matrix Theory
Sparse Matrix-Vector Multiplication on GPGPUs
ACM Transactions on Mathematical Software
Applied Mathematics
Software
Perfomance Models for Blocked Sparse Matrix-Vector Multiplication Kernels
Data-Driven Mixed Precision Sparse Matrix Vector Multiplication for GPUs
Transactions on Architecture and Code Optimization
Hardware
Information Systems
Architecture
Software
Locality-Aware Parallel Sparse Matrix-Vector and Matrix-Transpose-Vector Multiplication on Many-Core Processors
IEEE Transactions on Parallel and Distributed Systems
Hardware
Computational Theory
Signal Processing
Architecture
Mathematics
An Efficient Parallel Algorithm for Matrix-Vector Multiplication
Fast Sparse Matrix Multiplication
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
Performance Modeling and Optimization of Sparse Matrix-Vector Multiplication on NVIDIA CUDA Platform
Journal of Supercomputing
Hardware
Information Systems
Theoretical Computer Science
Architecture
Software
Sparse Matrix Multiplication: The Distributed Block-Compressed Sparse Row Library
Parallel Computing
Computer Graphics
Computer Networks
Hardware
Communications
Computer-Aided Design
Architecture
Theoretical Computer Science
Artificial Intelligence
Software