A Fast Simulation Framework for Full-Chip Thermo-Mechanical Stress and Reliability Analysis of Through-Silicon-Via Based 3D ICs

doi 10.1109/ectc.2011.5898596
Full Text
Abstract

Available in full text

Date
Authors
Publisher

IEEE

Related search

Electrical Modeling and Characterization of Through Silicon via for Three-Dimensional ICs

IEEE Transactions on Electron Devices
Electronic EngineeringOpticalElectricalMagnetic MaterialsElectronic
2010English

Experimental Stress Characterization and Numerical Simulation for Copper Pumping Analysis of Through-Silicon Vias

IEEE Transactions on Components, Packaging and Manufacturing Technology
Electronic EngineeringIndustrialManufacturing EngineeringOpticalElectricalMagnetic MaterialsElectronic
2016English

KLauS – A Charge Readout and Fast Discrimination Chip for Silicon Photomultipliers

Journal of Instrumentation
InstrumentationMathematical Physics
2012English

Stress Analysis for Cylinder Made of FGM and Subjected to Thermo-Mechanical Loadings

Metals
Materials Science
2018English

Analysis of Parallelization Efficiency of Coupled Thermo-Hydro-Mechanical Simulation

Journal of Environmental Science for Sustainable Society
2009English

Multi-Functional Interconnect Co-Optimization for Fast and Reliable 3D Stacked ICs

2009English

Signal Integrity Analysis in Carbon Nanotube Based Through-Silicon Via

Active and Passive Electronic Components
Electronic EngineeringOpticalElectricalMagnetic MaterialsElectronic
2014English

3D Convolutional GAN for Fast Simulation

EPJ Web of Conferences
AstronomyPhysics
2019English

X-Ray Nanodiffraction Analysis of Stress Oscillations in a W Thin Film on Through-Silicon Via

Journal of Applied Crystallography
BiochemistryGeneticsMolecular Biology
2016English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2024 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy