Three Snakes in One Hole: The First Systematic Hardware Accelerator Design for SOSEMANUK With Optional Serpent and SNOW 2.0 Modes

IEEE Transactions on Computers - United States
doi 10.1109/tc.2015.2435775
Full Text
Abstract

Available in full text

Date
Authors
Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Related search

Hardware Accelerator Design for Data Centers

2015English

On Serpent-Worship and on the Venomous Snakes of India /

1892English

Improved Linear Distinguishers for SNOW 2.0

Lecture Notes in Computer Science
Computer ScienceTheoretical Computer Science
2006English

Open Hardware for CERN's Accelerator Control Systems

Journal of Instrumentation
InstrumentationMathematical Physics
2012English

A Threshold Controller for FAST Hardware Accelerator

Journal of the Institute of Electronics and Information Engineers
2014English

On-Chip Hardware Accelerator for DSP Applications

International Journal of Recent Technology and Engineering
EngineeringManagement of TechnologyInnovation
2019English

An FPGA-based Hardware Accelerator for Iris Segmentation

English

Dynamical Modes Associated With the Antarctic Ozone Hole

Atmospheric Chemistry and Physics
Atmospheric Science
2009English

Scalable Rate-Distortion-Computation Hardware Accelerator for McTf and ME

2006English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2025 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy