Hardware Design and Implementation of a Network-On-Chip Based Load Balancing Switch Fabric

doi 10.1109/reconfig.2012.6416753
Full Text
Abstract

Available in full text

Date
Authors
Publisher

IEEE

Related search

Design and Implementation of a Network on Chip Using FPGA(English)

AL-Rafdain Engineering Journal (AREJ)
2013English

SDN-Based Switch Implementation on Network Processors

Communications and Network
2013English

Birkhoff-Von Neumann Switch With Deflection Based Load Balancing

Telfor Journal
Media TechnologySignal ProcessingComputer NetworksRadiationCommunicationsSoftware
2017English

Design and FPGA Implementation of Intelligent Helmet Hardware Chip for Safe Drive

International Journal of Engineering and Technology
Transfer ProcessesFluid FlowMechanical EngineeringAerospace Engineering
2016English

Quantifying Contention and Balancing Memory Load on Hardware DSM Multiprocessors

Journal of Parallel and Distributed Computing
Computer NetworksHardwareCommunicationsArchitectureTheoretical Computer ScienceArtificial IntelligenceSoftware
2003English

The Load Balancing System Design of Service Based on IXP2400

Advanced Engineering Forum
2011English

System-On-Chip Design and Implementation

IEEE Transactions on Education
Electronic EngineeringEducationElectrical
2010English

On Load Balancing in a Dense Wireless Multihop Network

English

Switch Allocator for Bufferless Network-On-Chip Routers

2011English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2024 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy