A 17ps Time-To-Digital Converter Implemented in 65nm FPGA Technology

doi 10.1145/1508128.1508145
Full Text
Abstract

Available in full text

Date
Authors
Publisher

ACM Press

Amanote Research

Note-taking for researchers

Follow Amanote

© 2026 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy