Amanote Research
Register
Sign In
On-Chip Monitoring: A Light-Weight Interconnection Network Approach
doi 10.1109/dsd.2011.84
Full Text
Open PDF
Abstract
Available in
full text
Date
August 1, 2011
Authors
Pablo Ituero
Marisa Lopez-Vallejo
Miguel Angel S´nchez Marcos
Carlos Gomez Osuna
Publisher
IEEE
Related search
Light-Weight On-Chip Monitoring Network for Dynamic Adaptation and Calibration
IEEE Sensors Journal
Electronic Engineering
Electrical
Instrumentation
A Light-Weight Statically Scheduled Network-On-Chip
A Framework for Embedded Hypercube Interconnection Networks: Based on Neural Network Approach
International Journal of Computer Applications
CGMAP: A New Approach to Network-On-Chip Mapping Problem
IEICE Electronics Express
Electronic Engineering
Condensed Matter Physics
Optical
Electrical
Magnetic Materials
Electronic
Layout-Accurate Design and Implementation of a High-Throughput Interconnection Network for Single-Chip Parallel Processing
A Two-Stage Approach for Network Monitoring
Journal of Network and Systems Management
Information Systems
Computer Networks
Strategy
Hardware
Communications
Management
Architecture
A Practical Approach to Monitoring Network Redundancy
International Journal of Data and Network Science
Fpga Based Highly Reliable Fault Tolerant Approach for Network on Chip(noc)
International Journal of Research in Engineering and Technology
A Complete Network-On-Chip Emulation Framework