Amanote Research
Register
Sign In
Architecture-Level Fault-Tolerance for Biomedical Implants
doi 10.1109/samos.2012.6404163
Full Text
Open PDF
Abstract
Available in
full text
Date
July 1, 2012
Authors
Robert M. Seepers
Christos Strydis
Georgi N. Gaydadjiev
Publisher
IEEE
Related search
The MAFT Architecture for Distributed Fault Tolerance
IEEE Transactions on Computers
Hardware
Architecture
Mathematics
Computational Theory
Theoretical Computer Science
Software
Design Approach for Fault Tolerance in FPGA Architecture
International Journal of VLSI Design & Communication Systems
SEDC-Based Hardware-Level Fault Tolerance and Fault Secure Checker Design for Big Data and Cloud Computing
Scientific Programming
Computer Science Applications
Software
Correlative Tomography for Additive Manufacturing of Biomedical Implants
Microscopy and Microanalysis
Instrumentation
Multifunctional Nano-Architecture for Biomedical Applications
Measuring Masking Fault-Tolerance
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
Transparent Fault Tolerance for Scalable Functional Computation
Journal of Functional Programming
Software
A Conceptual Framework for System Fault Tolerance
Expert System Framework for Fault Detection and Fault Tolerance in Robotics
Computers and Electrical Engineering
Control
Systems Engineering
Electrical
Computer Science
Electronic Engineering