Improving Routing Efficiency for Network-On-Chip Through Contention-Aware Input Selection

doi 10.1145/1118299.1118310
Full Text
Abstract

Available in full text

Date
Authors
Publisher

ACM Press

Related search

Improving Routing Efficiency for Network-On-Chip Through Contention-Aware Input Selection

English

Self-Adaptive Contention Aware Routing Protocol for Intermittently Connected Mobile Networks

IEEE Transactions on Parallel and Distributed Systems
HardwareComputational TheorySignal ProcessingArchitectureMathematics
2013English

Improving Routing Efficiency in Location-Aware Wireless Ad-Hoc Networks

English

A Link-Stability Aware Routing for Improving DPDR in Mobile Ad-Hoc Network

International Journal of Computer Applications
2013English

A Contention-Aware Routing Metric for Multi-Rate Multi-Radio Mesh Networks

2008English

Cluster Based Hierarchical Routing Algorithm for Network on Chip

Circuits and Systems
2013English

Thermal Uniformity-Aware Application Mapping for Network-On-Chip Design

International Journal of Computer Applications
2014English

Analysis of Application-Aware On-Chip Routing Under Traffic Uncertainty

2011English

Hybrid Network-On-Chip: An Application-Aware Framework for Big Data

Complexity
MultidisciplinaryComputer Science
2018English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2025 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy