Amanote Research

Amanote Research

    RegisterSign In

Power Aware Multiprocessor System on Chip (MPSOC) Based on Dynamic Frequency Scaling of Soft Core Processors

HELIX
doi 10.29042/2018-4535-4543
Full Text
Open PDF
Abstract

Available in full text

Date

October 31, 2018

Authors
Mitali Patel
Publisher

BioAxis DNA Research Centre


Related search

Reliable Multiprocessor System-On-Chip Synthesis

2007English

Schedulability Analysis for Processors With Aging-Aware Autonomic Frequency Scaling

2012English

Improving Thermal-Safe Test Scheduling for Core-Based Systems-On-Chip Using Shift Frequency Scaling

English

Multi-Temperature Testing for Core-Based System-On-Chip

2010English

Dynamic Scheduling of Stream Programs on Embedded Multi-Core Processors

2012English

A Framework for Reliability-Aware Design Exploration on MPSoC Based Systems

Design Automation for Embedded Systems
HardwareArchitectureSoftware
2012English

Frequency Scaling Based Power Efficient Current Source Design on FPGA

International Journal of Engineering and Advanced Technology
EngineeringComputer Science ApplicationsEnvironmental Engineering
2019English

A Multiprocessor System on Chip for Real Time Cardiac Monitoring

International Journal of Engineering Research and
2016English

MPEG-based Performance Comparison Between Network-On-Chip and AMBA MPSoC

2008English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2026 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy