Amanote Research
Register
Sign In
Multi-Temperature Testing for Core-Based System-On-Chip
doi 10.1109/date.2010.5457209
Full Text
Open PDF
Abstract
Available in
full text
Date
March 1, 2010
Authors
P Eles
Publisher
IEEE
Related search
A Multi-Chip Data Acquisition System Based on a Heterogeneous System-On-Chip Platform
Springer proceedings in physics
High Energy Physics
Nuclear
A Multi-Chip Synchronization System Based on Diversity Technique
On-Chip Bus Architecture Optimization for Multi-Core SoC Systems
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
A Parallelized Implementation of Turbo Decoding Based on Network on Chip Multi - Core Processor
Journal of Engineering Science and Technology Review
Engineering
An Automated Surveillance System Based on Multi-Processor System-On-Chip and Hardware Accelerator
International Journal of Advanced Computer Science and Applications
Computer Science
Integrated LFSR Reseeding, Test-Access Optimization, and Test Scheduling for Core-Based System-On-Chip
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
Optimal Algorithms for Substrate Testing in Multi-Chip Modules
High Performance Design Automation for Multi-Chip Modules and Packages
Power Aware Multiprocessor System on Chip (MPSOC) Based on Dynamic Frequency Scaling of Soft Core Processors
HELIX
Energy Efficient Network-On-Chip Architectures for Many-Core Near-Threshold Computing System
Journal of Low Power Electronics
Electronic Engineering
Electrical
