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Publications by Anantha Chandrakasan
All-Digital Circuits for Measurement of Spatial Variation in Digital Circuits
IEEE Journal of Solid-State Circuits
Electronic Engineering
Electrical
Approaching the Theoretical Limits of a Mesh NoC With a 16-Node Chip Prototype in 45nm SOI
Efficient Substitution of Multiple Constant Multiplications by Shifts and Additions Using Iterative Pairwise Matching
