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Publications by Anuradha Kumari Choudhari
IC Layout Design of 4-Bit Magnitude Comparator Using Electric VLSI Design System
IOSR Journal of VLSI and Signal Processing
Related publications
4-Bit Multiplier Design Using CMOS Gates in Electric VLSI
International Journal of Recent Technology and Engineering
Engineering
Management of Technology
Innovation
Low Power Magnitude Comparator Circuit Design
International Journal of Computer Applications
CMOS VLSI Design of Low Power Comparator Logic Circuits
Asian Journal of Scientific Research
Multidisciplinary
Design of 1-Bit Comparator Using 2 Dot 1 Electron Quantum-Dot Cellular Automata
International Journal of Advanced Computer Science and Applications
Computer Science
Design of Double Tail Comparator Using Dual Mode Logic in PTL Design
International Journal of Innovative Research in Computer and Communication Engineering
Embedding Graphs in Books: A Layout Problem With Applications to VLSI Design
SIAM Journal on Algebraic Discrete Methods
Qca Design for 4-Bit Asynchronous Down Counter
International Journal of Advances in Signal and Image Sciences
Digital NBC Protection System BIT Optimization Design
MATEC Web of Conferences
Materials Science
Engineering
Chemistry
An 11-Bit Single-Ended SAR ADC With an Inverter-Based Comparator for Design Automation
IEICE Transactions on Electronics
Electronic Engineering
Optical
Electrical
Magnetic Materials
Electronic
