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Publications by Archana Rani
Novel Design of 32-Bit Asynchronous (RISC) Microprocessor & Its Implementation on FPGA
International Journal of Information Engineering and Electronic Business
Effect of Phytohormones on Shoot Apex and Leaf Explants of Withania Somnifera (Ashwagandha)
Journal of Applied and Natural Science
Related publications
Design and Implementation of Synthesizable 32-Bit Four Stage Pipelined RISC Processor in FPGA Using Verilog/VHDL
Nepal Journal of Science and Technology
32-Bit MIPS RISC Processor
International Journal for Research in Applied Science and Engineering Technology
Implementation and Design of 32 Bit Floating-Point ALU on a Hybrid FPGA-ARM Platform
Implementation of 5-Stage 32-Bit Microprocessor Based Without Interlocked Pipelining Stages
International Journal of Innovative Technology and Exploring Engineering
Mechanics of Materials
Electronic Engineering
Civil
Structural Engineering
Electrical
Computer Science
Design and Implementation of a Fully Asynchronous SFQ Microprocessor: SCRAM2
IEEE Transactions on Applied Superconductivity
Electronic Engineering
Condensed Matter Physics
Optical
Electrical
Magnetic Materials
Electronic
Design of FPGA Based 32-Bit Floating Point Arithmetic Unit and Verification of Its VHDL Code Using MATLAB
International Journal of Information Engineering and Electronic Business
CRISP: A Pipelined 32-Bit Microprocessor With 13-Kbit of Cache Memory
IEEE Journal of Solid-State Circuits
Electronic Engineering
Electrical
Design and FPGA Implementation of a Pseudo-Random Bit Sequence Generator Using Spatiotemporal Chaos
Information Technology. Microprocessor Systems. High-Performance Synchronous 32-Bit Bus: MULTIBUS II