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Publications by J. Sawada
Limited Switch Dynamic Logic Circuits for High-Speed Low-Power Circuit Design
IBM Journal of Research and Development
Computer Science
Related publications
CMOS VLSI Design of Low Power Comparator Logic Circuits
Asian Journal of Scientific Research
Multidisciplinary
Cell Based Design Methodology for BDD SFQ Logic Circuits: A High Speed Test and Feasibility for Large Scale Circuit Applications
IEEE Transactions on Applied Superconductivity
Electronic Engineering
Condensed Matter Physics
Optical
Electrical
Magnetic Materials
Electronic
Adiabatic Logic Circuits for Low Power VLSI Applications
International Journal of Science and Research (IJSR)
Cascadable Adiabatic Logic Circuits for Low-Power Applications
IET Circuits, Devices and Systems
Control
Systems Engineering
Electrical
Electronic Engineering
Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits
VLSI Design
Electronic Engineering
Computer Graphics
Hardware
Electrical
Architecture
Computer-Aided Design
Development of High-Speed and Low-Power Microprocessors Using Superconductive Circuits
IEEJ Transactions on Fundamentals and Materials
Electronic Engineering
Electrical
Performance Analysis of High Speed Domino CMOS Logic Circuits
International Journal of Computer Applications
Architectures for High Dynamic Range, High Speed Image Sensor Readout Circuits
Design Issues in Low-Voltage High-Speed Current-Mode Logic Buffers
