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Publications by J.L. Neves
Exploiting the On-Chip Inductance in High-Speed Clock Distribution Networks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hardware
Electronic Engineering
Electrical
Architecture
Software
Related publications
Compact On-Chip Wire Models for the Clock Distribution of High-Speed I/O Interfaces
On-Chip High Speed Localized Cooling Using Superlattice Microrefrigerators
IEEE Transactions on Components and Packaging Technologies
Design of On-Chip Testing Memory for High Speed Circuits
CVR Journal of Science & Technology
Evolution of TCP in High Speed Networks
International Journal of Future Generation Communication and Networking
Computer Networks
Communications
Effect of Material Dynamic Properties on the Chip Formation Mechanism During High Speed Machining
Zhongguo Kexue Jishu Kexue/Scientia Sinica Technologica
Control
Computer Networks
Systems Engineering
Communications
Estimating Link Capacity in High Speed Networks
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
Automatic On-Chip Backup Clock Changer for Protecting Abnormal MCU Operations in Unsafe Clock Frequency
IEICE Electronics Express
Electronic Engineering
Condensed Matter Physics
Optical
Electrical
Magnetic Materials
Electronic
Study on the Sound Field Distribution in the Intercity High-Speed Railway Coaches
Guaranteed Performance Communication in High Speed Networks