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Publications by K. Hanumantha Rao

Design of Area Efficient R2MDC FFT Using Optimized Complex Multiplier

International Journal of MC Square Scientific Research

English

Pongamia Bio Diesel – A Review

International Journal of Trend in Scientific Research and Development

English

Challenges in Sulphide Mineral Processing

The Open Mineral Processing Journal

English

Related publications

Design of an Optimized High Speed Multiplier Using Vedic Mathematics

Contemporary Engineering Sciences

Materials Science

Computer Networks

Transfer Processes

Social Sciences

English

An Area Efficient and High Speed Reversible Multiplier Using NS Gate

International Journal of Engineering Research and Applications

English

Area-Delay Efficient Flipping 2-D DWT Structure Using PEB Booth Multiplier

International Journal of Computer Applications

English

Energy-Efficient Approximate Multiplier Design Using Bit Significance-Driven Logic Compression

English

Area-Efficient FFT Processor for MIMO-OFDM Based SDR Systems

IEICE Electronics Express

Electronic Engineering

Condensed Matter Physics

Magnetic Materials

English

Temperature Sensing Based Energy Efficient Vedic Multiplier Design Using Either Proportionality or Similarity

Gyancity Journal of Engineering and Technology

English

Efficient Serial Multiplier Design Using Ripple Counters,Kogge-Stone Adder and Full Adder

International Journal of Computer Applications

English

FPGA Implementation of Area Efficient CMOS Multiplier Using Fast Kogge Stone Look Ahead Logarithmic Adder

International Journal of Recent Technology and Engineering

Management of Technology

English

High Speed Area Efficient FFT Using Modified SQRT CSLA and 5:3 & 9:4 Compressor

English