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Publications by Kang-Yoon Lee
A Low Power, Small Area Cyclic Time-To-Digital Converter in All-Digital PLL for DVB-S2 Application
Journal of Semiconductor Technology and Science
Electronic Engineering
Optical
Electrical
Magnetic Materials
Electronic
A Design of Small Area, 0.95 mW, 612–1152 MHz Open Loop Injection-Locked Frequency Multiplier for IoT Sensor Applications
Related publications
Ultra Low Power Analog to Digital Converter for Biomedical Applications
A Review on Design and Analysis of Low Power PLL for Digital Applications
International Journal for Research in Applied Science and Engineering Technology
A Digital Implementation of the Time-Optimal PLL
Transactions of the Society of Instrument and Control Engineers
Low Power Folding and Interpolating Analog to Digital Converter Using 180nm Technology
International Journal of Advance Engineering and Research Development
Discrete-Time Modelling and Experimental Validation of an All-Digital PLL for Clock-Generating Networks
Design and Analysis of Low Power Analog to Digital Converter Using CMOS Technology
IARJSET
An All-Digital Single-Chip Symbol Synchronizer and Channel Decoder for DVB
A Multi-Channel Time-To-Digital Converter Chip for Drift Chamber Readout
IEEE Transactions on Nuclear Science
Electronic Engineering
Nuclear
Nuclear Energy
High Energy Physics
Engineering
Electrical
A 17ps Time-To-Digital Converter Implemented in 65nm FPGA Technology
