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Publications by Luca Benini
Energy Analysis of Decoders for Rakeness-Based Compressed Sensing of ECG Signals
IEEE Transactions on Biomedical Circuits and Systems
Electrical
Biomedical Engineering
Electronic Engineering
PULP-NN: Accelerating Quantized Neural Networks on Parallel Ultra-Low-Power RISC-V Processors
Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences
Mathematics
Engineering
Astronomy
Physics
A Synchronization-Based Hybrid-Memory Multi-Core Architecture for Energy-Efficient Biomedical Signal Processing
IEEE Transactions on Computers
Hardware
Architecture
Mathematics
Computational Theory
Theoretical Computer Science
Software
GPU Acceleration for Simulating Massively Parallel Many-Core Platforms
IEEE Transactions on Parallel and Distributed Systems
Hardware
Computational Theory
Signal Processing
Architecture
Mathematics
Hyperdrive: A Multi-Chip Systolically Scalable Binary-Weight CNN Inference Engine
IEEE Journal on Emerging and Selected Topics in Circuits and Systems
Electronic Engineering
Electrical
A Prosthetic Hand Body Area Controller Based on Efficient Pattern Recognition Control Strategies
Sensors
Instrumentation
Information Systems
Electronic Engineering
Biochemistry
Analytical Chemistry
Molecular Physics,
Electrical
Atomic
Medicine
Optics
YodaNN: An Architecture for Ultra-Low Power Binary-Weight CNN Acceleration
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
An Energy-Efficient Integrated Programmable Array Accelerator and Compilation Flow for Near-Sensor Ultra-Low Power Processing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
XNOR Neural Engine: A Hardware Accelerator IP for 21.6 fJ/op Binary Neural Network Inference
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
Cost-Effective Design of Mesh-Of-Tree Interconnect for Multicore Clusters With 3-D Stacked L2 Scratchpad Memory
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hardware
Electronic Engineering
Electrical
Architecture
Software
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