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Publications by M.N.V. Raghu Sai
Efficient and Low Latency Turbo Encoder Design Using Verilog-HDL
International Journal of Engineering and Technology(UAE)
Architecture
Hardware
Engineering
Chemical Engineering
Biotechnology
Environmental Engineering
Computer Science
Related publications
FPGA Implementation of Low Power Digital QPSK Modulator Using Verilog HDL
Journal of Applied Sciences
Simulation of 16 Bit ALU Using Verilog-HDL
International Journal of Trend in Scientific Research and Development
Implementation of Reduced Memory Viterbi Decoder Using Verilog HDL
IOSR Journal of Electronics and Communication Engineering
FPGA Implementation of Digital Modulation Techniques BPSK and QPSK Using HDL Verilog
International Journal of Computer Applications
High Performance Turbo Encoder Using Mealy FSM State Encoding Technique
International Journal of Engineering and Technology(UAE)
Architecture
Hardware
Engineering
Chemical Engineering
Biotechnology
Environmental Engineering
Computer Science
Design of CABAC Entropy Decoding, Inverse Quantization, Inverse Transform Blocks of H.264 Decoder Using Verilog HDL
International Journal of Innovative Technology and Exploring Engineering
Mechanics of Materials
Electronic Engineering
Civil
Structural Engineering
Electrical
Computer Science
Concurrent OFDM Demodulation and Turbo Decoding for Ultra Reliable Low Latency Communication
IEEE Transactions on Vehicular Technology
Electronic Engineering
Automotive Engineering
Computer Networks
Applied Mathematics
Communications
Electrical
Aerospace Engineering
H.264 Decoder Design Using Verilog (With Simulation Results)
International Journal of Computer Applications
An Optimized Distributed Video Coding Using Turbo Codes and Zero Motion Skip Encoder Strategy
IOSR Journal of Electronics and Communication Engineering
