Amanote Research
Register
Sign In
Discover open access scientific publications
Search, annotate, share and cite publications
Publications by Mateo Valero
Speculative Execution for Hiding Memory Latency
ACM SIGARCH Computer Architecture News
Online Prediction of Applications Cache Utility
Microarchitectural Support for Speculative Register Renaming
Increasing the Number of Strides for Conflict-Free Vector Access
A Case for Resource-Conscious Out-Of-Order Processors
MFLUSH: Handling Long-Latency Loads in SMT On-Chip Multiprocessors
Measuring Operating System Overhead on CMT Processors
‹
1
2
3
