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Publications by Riccardo Aragona
Implementation and Improvement of the Partial Sum Attack on 6-Round AES
Lecture Notes in Electrical Engineering
Industrial
Manufacturing Engineering
Related publications
Power-Analysis Attack on an ASIC AES Implementation
Implementation of AES on FPGA
IOSR journal of VLSI and Signal Processing
Distinguisher and Related-Key Attack on the Full AES-256
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
Improved DPA Attack Method on AES Encryption
Structural Evaluation of AES and Chosen-Key Distinguisher of 9-Round AES-128
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
VHDL Implementation of AES-128 on FPGA
IJIREEICE
Frontside Laser Fault Injection on Cryptosystems - Application to the AES' Last Round -
A Meet-In-The-Middle Attack on Reduced-Round Crypton
Software Engineering and Applications
On the Maximum Partial Sum of Independent Random Variables
Proceedings of the National Academy of Sciences of the United States of America
Multidisciplinary
